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    1,605 need project fpga freelance jobs found, pricing in AUD

    Hands-on experience on FPGA programming from requirements till validation  Design architecture for FPGA based solutions  Strong expertise in RTL programming, verification and validation.  Proven experience in delivering at least one complex FPGA design project  VHDL, Verilog based RTL design and development  VHDL, Verilog based verification

    $2367 (Avg Bid)
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    3 bids

    I want to build or re purpose an FPGA board to mine with. I do not want to mine bitcoin or anything SHA 256 or scrypt. I do not want GPU information I already have a GPU farm. I DO NOT WANT ASICS unless you're sure it can be converted over to my use case. You should know about mining software and hardware before bidding. This is just for information

    $1498 (Avg Bid)
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    8 bids

    Design a small PCB (~20x25mm) around an bear-bone FPGA-chip (XC7A15T-1CPG236C) that is able to configure itself on every power-up from a flash memory that can be also found on the PCB. Also it is necessary to design a programming interface for the flash memory on the PCB as it should be possible to load the bitstream to the flash with an ESP32 module

    $1263 (Avg Bid)
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    28 bids

    design an Sdram ddr using verilog and test, verify it using Synopsis and TETRAMAX ATPG. finally verify the same design in FPGA.

    $418 (Avg Bid)
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    Hi Anh I need you to help with an image processing work to be implemented in FPGA. I have done its sample simulation in matlab. can you be of assistance? Thanks Mike

    $126 (Avg Bid)
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    1 bids

    Hi Quan I need you to help with an image processing work to be implemented in FPGA. I have done its sample simulation in matlab. can you be of assistance? Thanks Mike

    $126 (Avg Bid)
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    1 bids

    Hi. I've got an advanced FPGA and ARM PCB design that currently works, but I'd like it improved since we have signal integrity issues at the moment and would like a much nicer re-designed board layout. Thanks.

    $490 (Avg Bid)
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    Tell me what you can do to make me an FPGA miner. This is just a paid discussion you don't have to do any work yet. If you can do something for me then we can move forward. Thanks.

    $33 (Avg Bid)
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    10 bids

    Hi. I've got an advanced FPGA and ARM PCB design that currently works, but I'd like it improved since we have signal integrity issues at the moment and would like a much nicer re-designed board layout. Thanks.

    $1029 (Avg Bid)
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    25 bids

    Hi olegkaravaev84, I need you to help with an image processing work to be implemented in FPGA. I have done its sample simulation in matlab. can you be of assistance? Thanks Mike

    $63 (Avg Bid)
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    1 bids

    Hi Umair I need you to help with an image processing work to be implemented in FPGA. I have done its sample simulation in matlab. can you be of assistance? Thanks Mike

    $63 (Avg Bid)
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    1 bids

    Hi Kareem I need you to help with an image processing work to be implemented in FPGA. I have done its sample simulation in matlab. can you be of assistance? Thanks Mike

    $63 (Avg Bid)
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    1 bids

    Hi Zain I need you to help with an image processing work to be implemented in FPGA. I have done its sample simulation in matlab. can you be of assistance? Thanks Mike

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    1 bids

    I want someone who can help me to read the results data from FPGA board on MATLAB software. Verilog HDL language will be used.

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    16 bids

    Hi Chhanda, I need you to help with an image processing work to be implemented in FPGA. I have done its sample simulation in matlab. can you be of assistance? Thanks Mike

    $63 (Avg Bid)
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    1 bids

    I'm building a license plate detection system,...using MATLAB. The current challenge is to implement the design on an Altera DE Board FPGA using VHDL. At this point, because of time constraints I like to ask for ur assistance in the following areas I seek someone who could help Implement the design on an FPGA. Attached is the matlab code

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    This is the project: FSM, saving data blocks received via RS-232 with fixed baud rate in external RAM and extracting necessary byte from arbitrary address (selected by slide-switches). - I need VHDL code and Testbench. -Explain its behavior and parts. I am using ZedBoard ZYNQ SOC training , Xilinx Zynq-7000

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    9 bids

    Coding required for FPGA to SFP communication

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    Hi, I run a small sales business in the video game industry. I am looking for someone with VHDL experience to assign pins on an FPGA board for an old video game system, to a new pre-designed break out board to allow the system to use HDMI. Please contact for details.

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    Design of FPGA to serve as a memory mapped resource for a local processor module. The processor interface is a memory mapped address/data bus. The FPGA design contains registers, counters and data path functions. System clock frequency is 25MHz. No internal processor is used within the FPGA. An external SRAM is required for expanded data storage

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