Semiconductor jobs

need 200 Drawings of Semiconductor Engineering and Manufacturing engineering open to pay but drawings should not be AI or Google generated....i will try some sample 5 drawings and if they are passed then i will take the rest. Per Drawing i will pay $5. i am looking for Engineering drawings from Specialized domains : 1. Semiconductor Engineering 2. Manufacturing Engineering 3. Utilities and Power Systems 4. Robotics & Automation

...global electronic components distributor, and we are looking for experienced technical writers for a long-term collaboration. If you have a background in electronics engineering and enjoy writing high-quality technical content, we'd love to hear from you. What You'll Do You will write original technical articles related to electronic components and circuit design, including topics such as: Semiconductor devices Passive components PCB design Embedded systems Power management Electronic component selection Industrial automation IoT applications Electronic engineering tutorials The article title, outline, target keywords, and writing requirements will all be provided by us. Requirements To be considered, please make sure you meet most of the following requirements: 1....

I need a PowerPoint that walks through a complete yield-improvement study in the diffusion stage of semiconductor manufacturing. The story has to be driven by a combination of Design of Experiments and ANOVA, so that every slide shows why a factor was chosen, how the experiment was laid out, how the model was validated, and finally how much yield was recovered. Please assume I want to see: • a concise process overview that frames the diffusion bottleneck, • the raw or simulated data you analysed, • clear DOE tables (factor levels, runs, replicas), • ANOVA tables with p-values highlighted, • diagnostic plots, interaction plots and optimisation results, • the calculated gain in yield and the practical recommendation for the fab. If you alre...

...scripting (mandatory) • Shell / Bash — flow automation • Perl — log parsing (good to have) Version Control • Git / GitHub — branching, commits, pull requests, Markdown documentation Qualifications Criteria Requirement Education B.E. / / in ECE, EEE, VLSI, or Microelectronics Experience 2–6 years in VLSI physical design, RTL design, or verification Industry background Worked in semiconductor / EDA / chip design company preferred Teaching experience Prior training or mentoring experience is a strong plus Tools familiarity OpenROAD + Yosys (mandatory); Cadence/Synopsys (preferred) Good to Have (Bonus Skills) • Experience with Efabless / Google Open MPW shuttle tapeout • Familiarity with FPGA flows (Vivado / Quartus) • Knowledge...

I'm seeking an experienced electronic engineer based in Hong Kong to help locate obsolete digital ICs, specifically the SC28L198A1A. Key Requirements: - Expertise in sourcing obsolete electronic...seeking an experienced electronic engineer based in Hong Kong to help locate obsolete digital ICs, specifically the SC28L198A1A. Key Requirements: - Expertise in sourcing obsolete electronic components - Familiarity with the local electronics market in Hong Kong - Ability to negotiate with suppliers Ideal Skills and Experience: - Background in electronics engineering - Strong network in the semiconductor industry - Previous experience in sourcing hard-to-find components Please provide a detailed plan on how you will approach this task. Your expertise is crucial for the success o...

I'm seeking a talented designer to create a timeless and premium corporate logo for SecEnAi Semiconductors and Test Solutions Pvt. Ltd., an aerospace and semiconductor technology company. The logo should be a minimal, abstract symbol that reflects Fortune 500 branding quality. Key Requirements: - Monochrome color scheme - Abstract symbol style - Attributes: Innovation, Reliability, Elegance - Avoid generic tech clichés Ideal Skills and Experience: - Proven logo design portfolio, particularly for corporate clients - Experience in creating minimalist and abstract designs - Strong understanding of branding for high-end markets - Ability to conceptualize and execute unique and non-generic ideas Please submit a portfolio with your bid.

I’m launching PRISM – the “Platform for Research in Integrated Silicon Multi-physics” – and I need a logo that immediately signals cutting-edge semiconductor research to engineers, academics, and industry partners alike. Think clean, minimalist lines rather than ornate graphics; the emphasis is on a contemporary, highly technical look that feels at home in a journal publication or on a silicon die photo. Here’s the visual direction I have in mind: • Style: Minimalist, with crisp geometry that reads well at any scale. • Core imagery: a subtle microchip outline or die corner, intersected by spectrum-like lines that hint at the full range of physics we test (light, radiation, heat, electromagnetics). Please weave in physics-related iconogr...

# Video Editor (YouTube Shorts) – AI Chip Insider Channel We are looking for a highly skilled Video Editor to create engaging, fast-paced YouTube Shorts for a tech-focused channel covering AI chips, advanced semiconductors, and semiconductor fabrication technology. ## About the Channel Our content simplifies complex topics like AI hardware, chip manufacturing, and semiconductor fabs into visually compelling, easy-to-understand short-form videos for a global audience. ## Role Overview The editor will transform raw scripts and voiceovers into high-retention, cinematic-style shorts inspired by storytelling-driven explainer channels, combining clarity, motion graphics, and strong visual narrative. ## Responsibilities * Edit YouTube Shorts (15–60 seconds) with a...

...expected objections, technical validation requirements, and possible contract models. 7. Reporting and dashboard Provide a simple tracking dashboard showing target companies, contacts, outreach status, replies, meeting outcomes, opportunity score, next action, and estimated contract potential. Ideal freelancer profile The ideal freelancer has experience in at least one of the following areas: semiconductor business development, AI data center infrastructure, Nvidia ecosystem partnerships, optical networking, photonic interconnects, FPGA/ASIC development, cybersecurity hardware, enterprise sales, energy infrastructure, or strategic technology deal sourcing. Expected deliverables • Market map of relevant companies and sectors • Target list of companies and decision-m...

Project Description: I am looking for an experienced electronics design engineer with a background in Nordic Semiconductor SoCs to develop a compact, high-efficiency PCB for a motion-tracking sensor node. Hardware Requirements: MCU: Nordic nRF52810 (BLE 5.0 SoC). Sensor: STMicroelectronics LIS2DW12 (3-axis accelerometer, ultra-low power). Memory: Winbond (1024Mb SPI Flash) to store 30 days of data at 12Hz. Power Source: CR2032 or CR2050 Coin Cell Battery (Design must be optimized for low peak current/high internal resistance). Antenna: Integrated PCB Trace Antenna or Ceramic Chip Antenna (with impedance matching network). Required Deliverables: Full Schematic: (PDF and source files). PCB Layout: 2-layer design, compact form factor (approx. 25x25mm to 30x30mm). Fabrication...

Project Overview I am looking for a graphic designer to create a modern logo for my engineering software project: FISIC – Fault Injection Simulator for Integrated Circuits. The tool is used in cybersecurity and microelectronics to simulate physical fault injection attacks (such as lasers and radiation particles) on semiconductor chips. Core Concept & Imagery I have attached two concepts for reference. I want to avoid looking like a car logo. Instead, the design should focus on a clean, technical representation of physical attacks on a chip using three core elements: The Circuit Grid (Cartography): A collection of squares filling the inner area of the logo to simulate a circuit layout or a "cartography of sensitive areas" on a silicon die. The Simulation Circle...

...Hardware security Integrated circuits (ICs) Fault injection attacks Semiconductor testing Cybersecurity and embedded systems I already have a concept/mockup made with AI (attached image) that includes: A microchip outline A lightning bolt symbolizing fault injection/electrical disturbance A modern typography style Dark background with red/gold/gray tones The new logo should improve and professionalize this concept. It can be simpler, no need to have the chip, it is optional. Basically it is particles from space or laser that "hits" the chip but I prefer the bolt as the strike symbol (this is a requirement). Requirements Clean, modern, and professional design Strong cybersecurity / semiconductor / electronics identity Vector format preferr...

...network drops gracefully and automatically reconnect to both the cellular network and the MQTT broker without requiring a hardware reset. 3. **Clean Code Delivery:** All source code, build configuration files (``, `Kconfig`, Devicetree overlays), and documentation must be delivered well-structured and cleanly commented. --- ### Preferred Qualifications * Proven experience with **Nordic Semiconductor** chips (nRF91 series) and the **nRF Connect SDK (NCS)**. * Deep understanding of **Zephyr RTOS**, device trees, and the Zephyr MQTT client library. * Experience with cellular IoT (NB-IoT/LTE-M) network states, power management, and AT commands. * Excellent communication skills for remote collaboration and documentation. If you have successfully pushed sensor data over NB-IoT usin...

I need help filling my pipeline with startups that have an immediate or near-term need for functional design verification. My team handles everything from block-level to full-chip functional verification using SystemVerilog, UVM, JasperGold, VC Formal and related EDA flows, so...every accepted lead Acceptance criteria • Leads must be genuine startups (seed to Series C) developing ASIC, SoC or FPGA products • Each lead expresses a current functional verification pain point and interest in external support • Contact information is current, direct and non-generic If you have a proven track record generating leads for technical services or selling into the semiconductor design space, let’s talk about timelines and how many introductions you can realistic...

...high-level view of System-on-Chip flows—always keeping explanations at a beginner’s pace. The plan is to combine theory with practice: after introducing core concepts, each topic should segue into a hands-on lab that walks students through RTL-to-GDSII using at least one EDA tool (Cadence, Synopsys, or an open-source alternative such as OpenLane). Audience • 25 students with minimal semiconductor background • Expect interactive sessions and plenty of Q&A time Delivery • Live online lectures totalling roughly 8–10 hours • Recorded walkthroughs for tool demos • Printable lab sheets so students can work offline Deliverables • Detailed syllabus with learning objectives and tool-setup steps • Slide deck...

...compliance systems — governance became faster, transparent, and technology-driven.” “India climbed rapidly in global Ease of Doing Business rankings, reinforcing investor confidence and encouraging entrepreneurship.” On Screen Text: Startup India Make in India Digital India PM Gati Shakti National Logistics Policy Segment 4: Manufacturing & Investment Growth Visuals: Electronics manufacturing, semiconductor plants, mobile phone factories, industrial corridors, foreign investors, modern logistics parks. Voiceover: “India evolved into a global manufacturing powerhouse.” “Massive investments flowed into sectors such as electronics, automobiles, defence, renewable energy, pharmaceuticals, and semiconductors.” “Through i...

Here is the professional project description in English, ready to be posted on platforms like Upwork, Fiverr, or Freelancer.com. Project Title: Hardware Design (Schematic & PCB Layout) for Ultra-Low Power BLE Motion Sensor (nRF52810) Project Description: I am looking for an experienced electronics design engineer with a background in Nordic Semiconductor SoCs to develop a compact, high-efficiency PCB for a motion-tracking sensor node. Hardware Requirements: MCU: Nordic nRF52810 (BLE 5.0 SoC). Sensor: STMicroelectronics LIS2DW12 (3-axis accelerometer, ultra-low power). Memory: Winbond W25Q512 (512Mb SPI Flash) to store 15 days of data at 6Hz. Power Source: CR2032 Coin Cell Battery (Design must be optimized for low peak current/high internal resistance). Antenna: Integrate...

We are looking for an experienced GDS Design Engineer for a semiconductor project. Scope GDS layouts & P&IDs UHP gas system design Isometric drawings & BOQ/BOM Gas line sizing & component selection Technical coordination during execution Preferred Experience Semiconductor / Cleanroom / UHP Gas projects Experience with N2, Ar, He, O2, CDA systems Knowledge of gas cabinets, VMB/VMP, changeover systems AutoCAD / Plant 3D experience preferred Duration 3–6 Months (extendable) Project Location- Bangalore Interested candidates may share: Profile & experience Sample project references Availability & commercial terms

Advanced Electrochemical Surface Conditioning for High-Purity Components Service Provider: Alfa Electropolishing Pvt Ltd 1. Project Overview This project involves the electropolishing (EP) of stainless steel components—including tanks, process piping, and intricate aeronautical parts—to achieve a microscopically smooth, ultra-clean sur...B912 or specific industry audit requirements. • Ready-to-Install Components: Parts that are fully passivated, debris-free, and vacuum-sealed if required. Applications • Pharmaceutical: Pressure vessels, fermentation tanks, and manifolds. • Food & Dairy: Heat exchangers, mixing blades, and transfer lines. • Aeronautical: Specialized precision brackets and fluid delivery components. • Semiconductor: Ultra-...

I’m expanding a small-scale computer-vision project and need roughly 870,000 synthetic 2-D images produced in JPEG format. These files will feed the training phase of my model, so visual realism is essential—nothing that looks obviously rendered to the naked eye. What you’ll start with • A folder of representative reference shots of semiconductor chips. • A CSV that spells out the colour palette, precise X-Y measurements and other per-image parameters. Core expectations • Build an automated pipeline in Unity (my preferred tool) that ingests the CSV, applies the specified colour accuracy and shape detail, and exports camera-ready JPEGs. • Use Python or C++ scripts to drive batch generation, manage naming conventions, and verify output c...

...insulation properties Semiconductor Equipment Related Technology Process equipment design and development for CVD, PVD, etching, ion implantation, annealing, etc. Hands-on experience in vacuum technology, plasma control, temperature control, gas flow control, etc. Wafer transfer system design (load lock, robot hand, vacuum chuck, etc.) Equipment maintenance, failure analysis, and yield improvement Materials & Manufacturing Process Forming, sintering, and machining of high-purity ceramic powders (AlN, Al₂O₃, SiC, etc.) Thin film formation processes (CVD, PVD, sputtering) Surface treatment and planarization (CMP, polishing, etching) technology Manufacturing management in cleanroom environments Application & Market Insight Advanced logic, memory (DRAM, NAND), power semico...

...capacitors, chip resistors, thermistors, and related parts, and I need a seasoned engineer who has driven the full cycle of electronic-component design, manufacturing, and process development. Your background in MLCC stack design, electrode patterning, sintering profile optimisation, and in-line quality control will be the core of this collaboration. Because many of our assemblies interface with semiconductor tools, practical knowledge of ceramic structural parts—ESCs, heaters, transfer arms, rings, discs, WDOs—is highly valued. If you have tuned shrinkage, matched CTEs, or solved plasma-etch erosion on these components, that insight will immediately inform our work. Experience formulating or adapting conductive pastes, especially silver or thermally curable systems ...

I need a compact PCB built around a Nordic Semiconductor SoC that will act as a self-contained IoT node. The key requirement is Thread connectivity, so please choose the Nordic part, RF front-end and antenna configuration that give reliable range while keeping the overall bill of materials within the roughly 70 € target called out in the brief. Once the component set is frozen, you will capture the schematic, lay out the board for low-power operation, and deliver production-ready Gerber files along with a clean, costed BOM that meets EU sourcing availability. Deliverables • Schematic (Altium, KiCad or Eagle) • PCB layout & Gerbers • Costed BOM capped at ~70 € • Basic manufacturing notes (stack-up, drill table, assembly guidance) I a...

Description: I'm looking for an experienced freelance recruiter or headhunter who can help m...candidates for relevant technical skills and experience Provide a shortlist of vetted candidates with profiles/CVs Ideal recruiter profile: Experience recruiting in the Southeast Asian (especially Malaysian) electronics/semiconductor industry Familiarity with hardware engineering roles and terminology Access to Malaysian talent pools (LinkedIn, local job boards, industry networks) Strong English communication skills Industry keywords: motherboard, PCB design, circuit board, hardware engineering, embedded systems, signal integrity, electronics manufacturing, semiconductor, Penang, Malaysia Budget and timeline are flexible — please share your approach and estimated deliv...

I want a complete, ready-to-use system that lets me evaluate every supplier, contract manufacturer, and assembly/test house against NIST, ISO, and wider semiconductor best-practice requirements to validate data integrity, identify counterfeit risks, and evaluate security practices across product lifecycle by distributing standardized security questionnaires , thereby establishing a baseline understanding of supply chain vulnerabilities. The work starts with a clean slate: a 30-question Hardware Security Questionnaire must be written from scratch, phrased for clear yes/no or evidence-based answers, and fully mapped to the three standards so I can show traceability during audits. Once the questionnaire is locked, I need an Excel-based scoring engine that converts responses and upload...

...establish a state-of-the-art manufacturing unit for spring-loaded connectors (Pogo Pins). We require a specialized Mechanical Design Engineer to create a portfolio of high-performance pogo pins tailored for four distinct industries: Mobile/Wearables: Ultra-miniaturized, waterproof (IP68) charging pins. Two-Wheeler EV: High-current (30A–60A) battery management pins with vibration resistance. Semiconductor: Fine-pitch (0.4mm–0.8mm) test probes for IC validation. Medical: Non-magnetic, biocompatible pins for diagnostic instruments. Scope of WorkThe selected designer will be responsible for: Component Design: 3D CAD modeling of the Plunger (various tip styles) Barrel, and Internal Spring. Architecture Selection: Implementing Bias-cut plungers or Ball-architecture to en...

...authority and polish of Wired, TechCrunch, and Futurism, yet with a completely distinct visual identity and editorial voice. The site will feel like it belongs to a major global media group — clean, authoritative, and built for longevity. Core focus: Artificial Intelligence (primary vertical – 50%+ of coverage) with strong supporting coverage of Quantum Computing, Robotics, Space Technology, Semiconductor & Chips, Emerging Technologies, and Cybersecurity. Every section will maintain a future-first lens.

Job Title: Part-Time Interviewer / Talent Assessor Industry Focus: New Energy, Semiconductors, Logistics & Supply Chain About Us: We are a professional consulting firm specializing in commercial due diligence and business advisory services for clients in the New Energy, Semiconductor, and Logistics sectors. We are looking for a sharp Part-Time Interviewer to help us identify top-tier talent to support our growing project demands. Role Description: We are seeking an experienced HR professional or industry expert to conduct online interviews and screen resumes. You will act as the gatekeeper for our talent pool, ensuring we hire consultants who possess both the industry knowledge and the analytical rigor required for high-level business consulting. Key Responsibilities: ...

..."issue-based alliances" (e.g., counterterrorism, chip controls) in reshaping global rules. - Evaluate U.S. preemptive interventions in transnational crimes and public health crises; analyze their ripple effects on Latin America and the Middle East. - Design U.S. market entry strategies for international clients (energy/tech/infrastructure/agriculture): identify high-growth states (EV industry chains, semiconductor clusters) and risk-averse regions; customize ESG compliance pathways aligned with state-level policies. - Provide contingency plans for local operational crises; develop lobbying strategies with state governments, industry associations (chambers of commerce, manufacturing alliances), and NGOs (environmental/civil rights) to advocate for integrating client inte...

I need a clean, highly detailed 3D model of a semiconductor at the chip level. The goal is strictly visualization, so accuracy in visible structures, proportions and materials takes priority over simulation-ready geometry. You will receive the reference drawings and any dimensional data I have as soon as we start; feel free to suggest additional views or measurements that will help you model the die, package and bond-pad layout convincingly. Realistic materials, basic lighting and camera setups that make the chip look photorealistic in standard renderers are welcome, but polygon efficiency is less important than visual clarity. Deliverables • The finished chip-level 3D model in a commonly-used format we agree on up front (OBJ, STL, native CAD or similar) • A short n...

I'm seeking an experienced FPGA developer to help debug logical errors in existing VHDL code for a Lattice Semiconductor MachX03 development board. Key Requirements: - Expertise in VHDL - Experience with Lattice Semiconductor FPGAs - Strong debugging skills, especially with logical errors Ideal Skills and Experience: - Proven track record in FPGA development and debugging - Familiarity with MachX03 specific features and tools - Ability to provide clear, concise solutions and documentation Looking forward to your expertise!

...to improve reliability for demos Enclosure & Physical Design Support • Supporting basic enclosure work (3D printing, fitting components into housings) • Helping ensure components fit cleanly into an orb / compact form factor • Coordinating with designers and software team where needed What This Role Is NOT To set expectations clearly, this role is not about: • VLSI / ASIC / chip design • Semiconductor fabrication • Academic electronics research • Writing papers or simulations only This role is about building a real, working device. Who Should Apply You are a great fit if you: • Have hands-on experience with embedded systems or electronics • Have worked with platforms like Raspberry Pi, Banana Pi, ESP32, Arduino, STM32, or sim...

...is critical, so keyword optimisation, semiconductor terminology, and role-specific phrasing must be on point. Deliverables • ATS-optimised résumé (PDF + editable DOCX) • Brief keyword report showing how the document targets typical job descriptions for the companies above • Optional short cover-letter template reusing the same core language Acceptance criteria • Scores 90 %+ on a standard ATS scan (e.g., Jobscan) for at least two sample job descriptions I provide • Includes measurable achievements or project outcomes wherever possible • Reads naturally to both engineers and HR staff, free of jargon overload or empty buzzwords Please share one or two engineering résumés you have written that secured intervi...

I am assembling a 30-member core team to take India from “importer” to “exporter” of advanced computing-grade semiconductor chipsets. Our immediate mandate is chip design and architecture that can scale from laptops through high-performance desktops, with a longer-term roadmap toward mobile and household appliance variants. Scope & objectives • Complete front-to-back architecture, RTL, verification, physical design and tape-out readiness for a flagship computing SoC. • Establish robust embedded-Linux–based reference boards and SDKs. • Lay the process groundwork for future fabrication partnerships outside India while we lobby for domestic fabs. Why this is different The programme is already capitalised at ₹55 crore, earmarked...

I am assembling a 30-member core team to take India from “importer” to “exporter” of advanced computing-grade semiconductor chipsets. Our immediate mandate is chip design and architecture that can scale from laptops through high-performance desktops, with a longer-term roadmap toward mobile and household appliance variants. Scope & objectives • Complete front-to-back architecture, RTL, verification, physical design and tape-out readiness for a flagship computing SoC. • Establish robust embedded-Linux–based reference boards and SDKs. • Lay the process groundwork for future fabrication partnerships outside India while we lobby for domestic fabs. Why this is different The programme is already capitalised at ₹55 crore, earmarked...

Looking for Professionals Experienced in Synopsys Sentaurus TCAD (CMOS Inverter Simulation) ⸻ I am looking for professionals who have hands-on experience using Synopsys Sentaurus TCAD for semiconductor device simulations, specifically CMOS inverter (NMOS/PMOS) structures. This post is intended to identify individuals who are familiar with device-level TCAD simulations using Sentaurus, including transient analysis and time-domain behavior of semiconductor devices. Typical areas of experience of interest include: • Synopsys Sentaurus TCAD (Sentaurus Device / SDevice, Sentaurus Workbench) • Semiconductor device modeling and physics-based TCAD simulations • CMOS inverter and MOSFET device simulations (NMOS & PMOS) • TCAD-based I–V char...

...properties of semiconductor materials. My immediate need is a focused research package that pulls together current best-practice imaging methods, recent peer-reviewed findings, and practical guidance on sample preparation so I can refine my own lab protocol. The work should cover conventional bright-field and dark-field approaches as well as advanced contrast techniques such as differential interference and confocal setups wherever they add value to semiconductor analysis. Please compare resolution limits, attainable contrast, and typical artefacts for silicon, III-V compounds, and emerging 2-D semiconductors, citing sources directly. Deliverables • A concise literature review (last five years) with full citations • A comparative matrix of optical technique...

I need a modern and sleek 1-page, double-sided flyer to showcase our company capabilities. This will be a leave-behind or handout for discussions. The flyer should include: - Company overview and mission - Capabilities list - Service offerings The markets to highlight are: - Military Aerospace - Space - Semiconductor - Energy - Medical Use of high-quality images representing each market is essential. Ideal Skills and Experience: - Graphic design expertise - Experience with corporate brochures/flyers - Ability to source or create high-quality, relevant images

...OPC UA and EtherNet/IP, and can back your work with tight documentation and remote commissioning support, I’d love to talk. The work will be carried out in Japan, with dispatch costs covered by the company. The person will be tasked with modifying a system already in operation within a semiconductor factory. Work will be performed within Japan. All travel and accommodation expenses will be covered by us. A water treatment system integrating Allen-Bradley and DeltaV is already operational at the semiconductor factory. You will be responsible for addressing minor modifications requested by the customer. Since there are no standard documents for this project, you must read, understand, and modify the actual PLC and DeltaV systems. The PLC is implemented using ladder l...

I already have a working PSpice schematic and an accompanying bill of materials. What I need now is a focused redesign that raises overall reliability without changing the core functionality. The priority is to examine every resistor, capacitor, semiconductor device (transistors and diodes), and the inductive elements—coils and transformers—and propose smarter substitutes or topology tweaks that extend lifetime, heat tolerance, and long-term stability. Your task is two-fold: first, revise the schematic in PSpice so the new parts and any layout adjustments are clearly shown; second, update the component list with specific part numbers, tolerances, and reliability notes. Run the necessary simulations (stress, worst-case, and thermal if appropriate) to demonstrate measured...

My team supports a steady flow of mid-to-senior searches for clients around the world and I’m expanding our network of independent recruiters to keep pace. The mandates cover both technical and non-technical specialties, with current demand concentrated in Technology, Healthcare, the intelligent-driving automotive sector, as well as Semiconductor, Fintech, Internet, Artificial Intelligence, Manufacturing, Energy, Consumer Goods, and other industries. Because each brief is international, familiarity with regional talent markets and the confidence to engage passive candidates are essential. Here’s how collaboration will work: • Source, screen, and present short-lists that meet the brief, focusing on candidates who already have solid experience within the target indu...

I have a new semiconductor-monitoring product in the works and need polished, presentation-ready 3D visuals of its two core elements: the Central Processing Enclosure and the External Sensor Hub. Because these are purely conceptual, engineering tolerances are not a concern; what matters is that the renders look sleek, modern, and immediately convey the product’s aesthetic appeal to investors and stakeholders. The style direction is firmly modern, with smooth lines, subtle detailing, and an overall emphasis on aesthetics. Think of how premium lab equipment mixes practicality with visual sophistication. Material cues should suggest a high-grade polycarbonate shell—clean, slightly translucent or satin-finished plastic—so viewers can sense a lightweight yet robust ...

...mechanically linked in series. • Optimise every printed part for PETG FDM printing—minimum support strategy, sensible wall thicknesses, and tolerance call-outs for hobby-grade printers. • For one critical housing element, provide an injection-mould-ready version: split lines, draft angles, ejector pin locations, and gate suggestions included. • Ensure the internal cavity securely seats a custom semiconductor sensor module and keeps it isolated from splash intrusion. • Confirm buoyancy and basic stability in calm freshwater conditions. Deliverables 1. Native CAD assembly and neutral formats (STEP, IGES). 2. Exploded views with labelled fasteners and off-the-shelf seals. 3. A concise manufacturing pack: STL set for PETG prints, 2D drawings w...

...several Tier-1 global brands, including Rigol, Tonghui, Faith Tech, SEGGER, iTech, Hope Instruments, MYiR, and others. We deliver high-performance solutions across automotive, semiconductor, defense, renewable energy, education, and R&D sectors. Role: Consultant (Commission-Based) We are seeking dynamic consultants or sales professionals to develop and manage business opportunities in automotive, semiconductor, and government sectors. The consultant will promote our OEM brands on our behalf and help drive project-based sales. Responsibilities: Identify and manage business opportunities within automotive, semiconductor, and government accounts. Promote and represent Tier-1 OEM brands like Rigol, Tonghui, Faith Tech, and SEGGER. Collaborate with the EMS sal...

I need a fresh bonding-head design optimised for semiconductor device assembly that relies exclusively on aluminum wedge bonding. Scope • Engineer the complete head layout—from transducer interface to wedge-tool tip—so it delivers consistent stitch bonds on standard lead-frame pads and silicon die metallisation. • Select or specify materials, surface finishes, and tolerances that withstand ultrasonic energy yet minimise tool wear when working with 25 – 75 µm Al wire. • Provide 3D CAD (STEP or SolidWorks native) plus dimensioned manufacturing drawings ready for CNC or EDM. • Include a brief application note covering recommended ultrasonic settings, clamp force range, and preventative maintenance. Acceptance The model should ma...

...mic preamp (e.g., SSM2167 IC, ~$2) + ADC (e.g., PCM1808, ~$2). Receiver: nRF24L01+ outputs to ESP32-S3 I2S/ADC for mixing. Feasibility: Low-quality audio (8-16 kHz mono) with ~20-50 ms latency; examples from RF24Audio library. For 2 mics: Multi-channel packets or separate frequencies. Range: 30-50m; digital for noise rejection. 5. In-Built Reverb for Karaoke (Requirement 7) Chipset: Spin Semiconductor FV-1 (~$10-15, SOIC-28). Single-chip DSP with built-in ADC/DAC and reverb algorithms. Integration: Analog path between mic input and ESP32-S3; control via I2C/SPI. Programmable with custom effects; low power (50 mW). Why? Very cheap raw IC; no software overhead if hardware-accelerated. Software fallback: ESP32-S3 with LADSPA plugins (but higher latency). 6. ESPNow Interface ...

I’m producing a series of VLSI tutorial videos and need custom 3D animations that help viewers grasp the underlying concepts visually. The goal is to transform abstract ideas—such as lithography s...MP4 files and the editable source project (Blender, Maya, or Cinema 4D are all fine) • Still frames or short GIF loops for thumbnails and chapter markers • One round of revisions per clip to polish timing or colour To be considered, show me examples of your prior 3D animation work—especially anything educational or tech-focused—and tell me briefly how your experience will let you explain semiconductor concepts visually. If you have workflows for fast iteration and version control, mention those as well. I’m ready to lock in a freelancer and st...

Project Brief: OnHold & Reprobe Rate Dashboard Automation 1. Project Background At present, engineers manually prepare a weekly report (PDF/PowerPoint) showing OnHold and Reprobe rates for semiconductor wafers tested during the 1st Probe and 2nd Probe processes. The weekly file (like OnHold and Reprobe Rate ) contains work week summaries: total OnHold wafers, OnHold rates, Reprobe wafers, Reprobe rates, and top die class contributors. The daily raw data for each week is captured in an Excel file (e.g., , containing 7 days of site-level wafer probing data). Engineers then manually summarize the Excel, create charts, and compile into a presentation to send to the customer. This process is time-consuming, error-prone, and inconsistent across engineers. 2. Project Objective

...**Languages**: **Korean & English** * **Revisions**: at least **2 rounds** ## Deliverables * **Pitch Deck**: PPTX + Google Slides + PDF * **One-Pager**: PDF * **Speaker Notes/Script**: DOCX/Google Docs * **FAQ/Q&A**: DOCX/Google Docs * **Design Source Files**: AI/PSD/Figma (as applicable) ## Requirements (Must/Preferred) * **Must**: Proven portfolio of **VC-facing IR decks** in **deep tech / semiconductor / AI / enterprise** * **Must**: Strong **English IR copywriting & storytelling** with tangible fundraising outcomes (preferred) * **Nice-to-have**: Familiarity with **Silicon Valley VC** expectations, **HW-SW co-design** narratives, market/competition slides * **Nice-to-have**: Financial/biz snapshot slides (TAM/SAM/SOM; benchmark comps) * **Collaboration**: Vide...

I have a collection of ~30 simple landing pages hosted on Lovable and Vercel that I use as business-information pages. I now need them converted automatically into self-contained static landing pag...Deliverables • A zipped folder per link containing , , JS (if any) and all images/fonts • Folder structure kept tidy and ready to deploy without additional tooling Turnaround and attention to detail will be key, so tell me how quickly you can convert each link and share examples of similar static rebuilds you’ve handled. Here are 2 pages (out of ~30 pages): Share evidence of converted files of the above links so I know you understood the task and can get things done.