Verilog / VHDL Jobs and Contests

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers on Freelancer
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Project/Contest Description Bids/Entries Skills Started Ends Price (AUD)
Instruction memory module in verilog design an instruction memory module in verilog, Module is the part of the memory unit. 9 Verilog / VHDL Feb 11, 2016 Feb 11, 20165d 13h $114
verilog coding and quartus everything describes in the attachment, and should know how to use quartus 5 Verilog / VHDL Feb 11, 2016 Feb 11, 20165d 12h $147
Send data from PC to FPGA. Verilog FPGA UART FTDI Hello everyone, I have a FPGA board connected to my PC through USB. This FPGA has a FTDI chip. I need to send data from Matlab to the FPGA and output this data to a pin, in order to see the data in a oscilloscope. The code must be written in Verilog. 6 Matlab & Mathematica, Verilog / VHDL, FPGA Feb 11, 2016 Feb 11, 20165d 8h $160
VHDL Programming I need some code written for a Papilio one 250K FPGA board. http://papilio.cc/index.php?n=Papilio.PapilioOne Code functionality is as follows Generate 3 waveforms inside the FPGA 50HZ sine wave 600HZ triangle waveform Inverse of the 600HZ triangle waveform Overlay and compare all waveforms When non inverted triangle waveform is less than Sine wave generate a logic high digital ... 7 Verilog / VHDL Feb 10, 2016 Feb 10, 20164d 18h $201
Configuration Need someone to build this for me. 4 PHP, Verilog / VHDL, Software Architecture Feb 10, 2016 Feb 10, 20164d 13h $79
wireless communication I need a project based on wireless communications. It would be great if the projects is based on Matlab/Simulink Project related to any wireless technology, mobile/cellular works for me. 22 Electronics, Matlab & Mathematica, Verilog / VHDL, Electrical Engineering, Telecommunications Engineering Feb 10, 2016 Feb 10, 20164d 10h $349
File transfer using with UDP and TCP File transfer using with UDP and TCP 19 C Programming, Java, Verilog / VHDL Feb 8, 2016 Feb 8, 20162d 13h $142
Vivado hls implementation of c code for face detection. vivado hls implementation of face detection algorithm written in c. 6 C Programming, Matlab & Mathematica, Verilog / VHDL, Face Recognition, FPGA Feb 7, 2016 Feb 7, 20161d 20h $548
low power pulse triggered flipflop based on signal feed through scheme In this brief, a low-power flip-flop (FF) design featuring an explicit type pulse-triggered structure and a modified true single phase clock latch based on a signal feed-through scheme is presented. The proposed design successfully solves the long discharging path problem in conventional explicit type pulse-triggered FF (P-FF) designs and achieves better speed and power performance. Based on ... 9 C Programming, Wireless, Electronics, Verilog / VHDL, Embedded Software Feb 7, 2016 Feb 7, 20161d 2h $163
microcontroller using verilog microcontroller having alu,decoder,ram 12 Verilog / VHDL, FPGA Feb 7, 2016 Feb 7, 20161d 2h $210
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