Verilog / VHDL Jobs and Contests

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers on Freelancer
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Project/Contest Description Bids/Entries Skills Started Ends Price (AUD)
Build a signal peak detector on FPGA The signal is sampled at 125 Mbps. Your design must be able to work with this sampling rate. The peak detector has 2 tasks: 1/ Detect peak amplitude 2/ Number of peaks per second. 2 Verilog / VHDL, FPGA Dec 4, 2016 Today6d 21h $541
Noise blanker FPGA it's included in HF transceiver 6 Verilog / VHDL, FPGA Dec 4, 2016 Today6d 12h $816
Combination and sequential lock Need to design a combination and digital lock using VHDL, K-maps and state machine diagrams. We need both the coding and the entire designing. 8 Verilog / VHDL, Digital Design Dec 3, 2016 Dec 3, 20165d 23h $148
matlab 18 Matlab and Mathematica, Verilog / VHDL, Algorithm, LabVIEW, FPGA Dec 3, 2016 Dec 3, 20165d 9h $1416
algorithm I want to get coding done for trading in stock markets 13 Matlab and Mathematica, Verilog / VHDL, Algorithm, CUDA, Machine Learning Dec 3, 2016 Dec 3, 20165d 8h $178
Electronics, Matlab and Mathematica, Verilog / VHDL, Electrical Engineering, FPGA Dec 2, 2016 Dec 2, 20163h 52m
artificial intelligence -- 2 prototyping of probabilistic programming framework for guided augmentation of expertise 8 Verilog / VHDL, Machine Learning, Robotics, Artificial Intelligence, Programming Dec 2, 2016 Dec 2, 20164d 3h $13021
artificial intelligence prototyping of probabilistic programming framework for guided augmentation of expertise 8 Artificial Intelligence, Machine Learning, Programming, Robotics, Verilog / VHDL Dec 2, 2016 Dec 2, 20164d 3h $2109
VHDL - 01/12/2016 13:10 EST I am an student studying Electrical and Information technology and at present doing a small project in VHDL is which is must as a part of our curriculam for which we are credited. As i am a newbee in VHDL i need a support for completing my project .Although i have managed to do some parts of my project myself , i have less time to complete it on time. Therefore i am looking for a Freelancer who i... 10 Verilog / VHDL, FPGA Dec 1, 2016 Dec 1, 20163d 15h $396
MIPS code explaining cache presentation regarding cache performance and its advantages using Mars simualtor 9 C++ Programming, Prolog, Software Architecture, Software Development, Verilog / VHDL Dec 1, 2016 Dec 1, 20163d 4h $650
assignment using altera softwear hello i have assignment using altera softwear its due by DECEMBER 5th 2016 Design and implement the logic circuit of a toll booth coin collection system. The system will allow the car to pass through when it receives at least 10 ?. The system will accept, 25 ?, 20 ?, 15 ?, 10 ? , 5? and give the correct change if the driver puts more than the required toll. If you put any design constraints, ... 4 Engineering, Electronics, Verilog / VHDL, Electrical Engineering, FPGA Dec 1, 2016 Dec 1, 20163d 2h $90
hello i have assignment using altera softwear my budget 25$ its due by DECEMBER 3rd 2016 Design and implement the logic circuit of a toll booth coin collection system. The system will allow the car to pass through when it receives at least 10 ?. The syst hello i have assignment using altera softwear my budget 25$ its due by DECEMBER 3rd 2016 Design and implement the logic circuit of a toll booth coin collection system. The system will allow the car to pass through when it receives at least 10 ?. The system will accept, 25 ?, 20 ?, 15 ?, 10 ? , 5? and give the correct change if the driver puts more than the required toll. If you put any design con... 3 Verilog / VHDL, Software Architecture, Software Development, FPGA, Design Dec 1, 2016 Dec 1, 20163d 2h $133
MIPS PART 1 : Infix Expression calculator Write a program that takes in, as a string, an expression in the Infix format and calculates its output. The program asks then the user for the next expression until the user hits the character ‘E’ which will terminate the program. • Follow the stack implementation discussed in class: it is mandatory the explicit usage of the stack in your code... 9 Verilog / VHDL, Prolog, Fortran, C++ Programming, Assembly Nov 30, 2016 Nov 30, 20163d $366
uml it is about creating a UML diagram 13 Verilog / VHDL, UML Design, Finite Element Analysis, Test Automation, SAS Nov 29, 2016 Nov 29, 20161d 22h $38
tic tac toe verilog coding it must be playable by a human and a computer. The computer should try to win/block the user. • The human should be able to choose a spot to place an X or an O (represent that how you want). • The computer should respond by trying to win or block the human player. • The human and computer should not overwrite existing letters. • It must have a reset button. • The sys... 6 Verilog / VHDL Nov 29, 2016 Nov 29, 20161d 21h $312
arena simulation 14 Matlab and Mathematica, Verilog / VHDL, Materials Engineering, Finite Element Analysis, Nanotechnology Nov 28, 2016 Nov 28, 20161d 1h $225
assembly 27 Verilog / VHDL, Solidworks, PCB Layout, Assembly, Circuit Design Nov 28, 2016 Nov 28, 20168h 47m $653
Cyclic redundancy check error detection code Need the verilog code for error detection for cyclic redundancy check 14 Verilog / VHDL Nov 28, 2016 Nov 28, 20165h 36m $178
Project for ahmedmohamed85 Hi ahmedmohamed85, I noticed your profile and would like to offer you my project. We can discuss any details over chat. 5 Engineering, Electronics, Verilog / VHDL, Microcontroller, Electrical Engineering, Nov 26, 2016 Nov 26, 20161d 19h $50
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