Verilog / VHDL Jobs and Contests

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers on Freelancer
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Project/Contest Description Bids/Entries Skills Started Ends Price (AUD)
How to Design a verilog Simulator - Project for punamsengupta So what i want is a detailed explanation (if some code showing in c/java some functions/constructor class which are implemented for the simulator's different functions as you mentioned in the explanation ) . Imagine i am telling this answer to a design automation engineer in an interview. So it should be a technical answer. Let me know if you have any concerns. Bid 20$ please for it 1 Verilog / VHDL Feb 5, 2016 Today6d 13h $28
complete Face detection algorithm purely in c A face detection algorithm using neural networks written in c with no openCV. 12 C Programming, Matlab & Mathematica, Verilog / VHDL, C++ Programming, FPGA Feb 3, 2016 Feb 3, 20164d 19h $484
discrete wavelet transform in verilog hello, i am in need of a verilog code for discrete wavelet transform. i will attach the papers i am working on. dwt paper is the dwt i need in my total project. i need it in 5days it is very small part of the project. thanks 4 Engineering, Verilog / VHDL Feb 3, 2016 Feb 3, 20164d 8h $78
FPGA based I have a DE0 nano board, we need to read 2 analog signals and generate PWM signal according to the input signals. One of the analog signal will determine the duty cycle of the pwm signal while the second analog signal will be used to fine tune the pwm signal output. The ADC is available on the development board and supporting hardware is also available. I need this project done at earliest. 11 Verilog / VHDL, FPGA Feb 2, 2016 Feb 2, 20163d 18h $591
Image steganography implemented on fpga using verilog i want to make a project on image steganography that is hiding text images in an image and i want to implement it on FPGA (field programmable gate array) using verilog. i want the whole source code and all the implementation steps and a full and final project report. 5 Project Management, Engineering, Verilog / VHDL, Electrical Engineering, Embedded Software Feb 1, 2016 Feb 1, 20162d 5h $1564
digital,verilog Router 1X3 using verilog and AHB_APB BRIDGE in verilog,fsm designing. 9 Verilog / VHDL Jan 31, 2016 Jan 31, 20161d 17h $214
hello i got this andoriod app for chating and calssified uses GPS features - open to bidding the Job is ready for delivery by developer I need some one to check the accuracy of the delivery according to requirements and it is up to the standard with applying some modifications if necessary. You can down load the APK file once you accept the job, thanks. 7 Translation, SEO, Verilog / VHDL, vBulletin, Telecommunications Engineering Jan 30, 2016 Jan 30, 2016Ended $239
FIR in VHDL. I need to implement a FIR with 32 programmable coefficients in Vhdl. Should handle 4x inputs. 28 Matlab & Mathematica, Verilog / VHDL Jan 30, 2016 Jan 30, 2016Ended $221
Sequence detection vhdl Project I have a vhdl project involving sequence detection. if you are familiar with vhdl for altera boards then apply. 11 Electronics, Verilog / VHDL, Electrical Engineering, FPGA Jan 29, 2016 Jan 29, 2016Ended $10
Image processing FPGA algorithm Implement an image face detection detection algorithm in FPGA using VHDL/ Verilog and also writing a MATLAB code to implement the same. 20 C Programming, Matlab & Mathematica, Verilog / VHDL, C++ Programming, FPGA Jan 29, 2016 Jan 29, 2016Ended $280
Reading an image through Verilog HDL I am a final year student in my UG and my project is to read an image through verilog hdl without using matlab. I want to use gray scale coding in order to read the image and hence simulate by giving an image as an input and converting into bits which will later be given to matlab for verification of correct output. Will you accept it? 6 Verilog / VHDL Jan 29, 2016 Jan 29, 2016Ended $11
Writing a c code that is an exact representation of a matlab code Writing a c code that is an exact representation of a matlab code 29 C Programming, Matlab & Mathematica, Verilog / VHDL, FPGA Jan 28, 2016 Jan 28, 2016Ended $233
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