Verilog / VHDL Jobs and Contests

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers on Freelancer
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Project/Contest Description Bids/Entries Skills Started Ends Price (AUD)
fuzzy logic controller coding in verilog/vhdl and implement in FPGA board and test for DC motor speed control i want to develop a fuzzy logic controller in fpga for dc motor speed conrol code should be written in verilog/vhdl or matlab system generator can also be used. 5 Matlab & Mathematica, Verilog / VHDL, Microcontroller, FPGA May 5, 2016 Today6d 5h $548
fuzzy controller in fpga implement fuzzy controllers in fpga 5 Matlab & Mathematica, Verilog / VHDL, Microcontroller, FPGA May 5, 2016 Today6d 4h $193
VHDL code for Sobel edge detection I want to get VHDL codes for Simulation of Sobel edge detector on Xilinx ISE design suite 6 Verilog / VHDL May 5, 2016 Today6d 3h $299
Convert matlab code to fixed-point using Matlab Fixed Point Designer. Description: Troubleshoot a code of Hovorka model for glucose-insulin interaction based on fixed-point design towards FPGA implementation. (based on floating-point design using MATLAB software.) So, implementation of fixed-point design of the Hovorka model using MATLAB Fixed-Point Designer is required with some analysis using a realistic set of test inputs. Coding is partially done, but ... 4 Engineering, Matlab & Mathematica, Verilog / VHDL, Algorithm, FPGA May 5, 2016 Today6d 2h $203
image watermarking DCT & DWT based watermarking 3 Verilog / VHDL May 5, 2016 May 5, 20165d 19h $637
Packet Parser on Xilinx Virtex 7 Hardware: Xilinx Virtex 7 FPGA - XC7VX415T Objective: - Read Datagrams(IP Packets) arriving on port on FPGA. - Record Source IP, Destination IP and Counter Number in Data-part of Packet. - Capture the information and save locally or send it to remote server as syslog. - Discard rest of the the IP packet. Example: Look at the attached PDF, there are 2 packets per page: - Source and D... 7 Verilog / VHDL, FPGA May 4, 2016 May 4, 20165d 17h $879
VHDL IMPLEMENTATION OF REED-SOLOMON CODING VHDL IMPLEMENTATION OF REED-SOLOMON CODING Forward Error Correction technique depending on the properties of the system or on the application in which the error correcting is to be introduced. Error control coding techniques are based on the addition of redundancy to the information message according to a prescribed rule thereby providing data a higher bit rate. This redundancy is exploited by... 5 Verilog / VHDL, Embedded Software May 4, 2016 May 4, 20165d $289
verilog simulation of algo verilog code simulation and other requirements 11 Verilog / VHDL, FPGA May 3, 2016 May 3, 20164d 4h $25
Electronics and Electrical Machines Expert Required Looking for Experts only. Details will be over chat and serious bidders only 19 C Programming, Electrical Engineering, Electronics, FPGA, Verilog / VHDL May 3, 2016 May 3, 20164d 3h $507
closed loop Brushless motor control (quadrature encoder) using FPGA Project info: -brushless motor control -Position Closed loop -quadrature encoder -VHDL -FPGA (ALTERA) -MOTOR => 100W Please experienced profiles only Please contact before biding 8 Verilog / VHDL, FPGA May 3, 2016 May 3, 20164d 3h $891
Project for ngochan1405 Hi ngochan1405, I noticed your profile and would like to offer you my project. We can discuss any details over chat. 2 Verilog / VHDL, Microcontroller, Metatrader, PCB Layout, Vietnamese May 1, 2016 May 1, 20162d 17h $141
morse code in vhdl transmitter and receiver (encoder and decoder) I have to design a morse code in vhdl with simulation. I want its encoder and decoder part. I want simple vhdl code which is easy to understand. 15 Electronics, Verilog / VHDL, Electrical Engineering, FPGA May 1, 2016 May 1, 20162d 9h $135
Adruino Project for Obtaining Cordinates After obtaining message from car 1 it should be sent to from car 2. 13 C Programming, Verilog / VHDL, Microcontroller, Electrical Engineering, Digital Design May 1, 2016 May 1, 20162d 4h $73
The project is about creating a 2-Road Junction Traffic Light Controller using VHDL. A detailed explanation on how to design the traffic light controller will be provided at the start and when required. Design, implement, and simulate a Traffic Light Controller for a junction of two roads (Road 1 and Road 2) with two traffic sets of lights as shown in Figure 1. Each road has a corresponding vehicle sensor (Road 1/2 Sensor) that needs to be triggered (active high for each vehicle detected) before the traffic lights for that road change state (otherwise they will stay at RED). You should use a M... 19 Engineering, Electronics, Verilog / VHDL, Microcontroller Apr 30, 2016 Apr 30, 20161d 13h $253
Bus Function Model (verilog coding) I want to have BFM example verilog codes. for example ,PCI, PCIe, USB3.0, USB2.0,USB1.1, Sata3.0,Sata2.0,Sata1.0 You should have a choice of one of them or, you may suggest another BFM. BFM have to have a testbench to include main function test cases, and assertion fail statements. 5 Verilog / VHDL Apr 30, 2016 Apr 30, 20161d 5h $74
Project for matlabmagic Hi matlabmagic, I noticed your profile and would like to offer you my project. We can discuss any details over chat. 4 Matlab & Mathematica, Verilog / VHDL, , Telecommunications Engineering, R Programming Language, Statistical Analysis Apr 30, 2016 Apr 30, 20163d 19h $28
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