Verilog / VHDL jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    45 jobs found, pricing in AUD

    Pv fed led lighting system: Harmony search algorithm based controller design I am using altium nano board . i need verilog code for above algorithm.

    $173 (Avg Bid)
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    2 bids
    Project for izafeirakis 8 days left
    VERIFIED

    Hi izafeirakis, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    $103 (Avg Bid)
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    5 bids
    Project for fattouma92 8 days left
    VERIFIED

    Hi fattouma92, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    $99 (Avg Bid)
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    1 bids

    I would like to hire a developer who can work exceptionally well in VHDL and is good in algorithms and matlab

    $148 (Avg Bid)
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    14 bids

    Project goal: Help design and implement a NAND Flash memory interface for a CPLD that will interface between a high-performance MCU and a NAND Flash device. Details: The CPLD will connect to the MCU using SPI (SO,SI,CLK,CS) and a DMA enabled memory I/O port (16-bit) and the CPLD will interface with the NAND memory using standard control, address and data lines (CE#,WE#,RE#,AKE,CLE,DQS and DQ0-D...

    $1591 (Avg Bid)
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    21 bids
    C Programming 4 days left

    Programmers Needed

    $157 (Avg Bid)
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    51 bids

    Ethernet Interface

    $3166 (Avg Bid)
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    20 bids

    We need a modification to an Ettus USRP SDR FPGA code. We have a working system and reference for a 1 TX and 1 RX system, using half of the USRP1, including the source files for the FPGA code and corresponding c library. We have working FGPA code for a 2 TX and 2 RX system, and but need about 15 lines of verilog code ported from the 1 TX and 1 RX system to the 2 TX and 2 RX system. Also, we nee...

    $1513 (Avg Bid)
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    The purpose of the switch is to switch video stream of Altera's VIP protocol from any input to any output. Each output can receive only one stream at a time. One input can be broadcasted to multiple outputs. Detailed requirements document attached. Only experienced freelancers with reviews

    $1366 (Avg Bid)
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    We would need design and production of FPGA or ASIC units optimized to run just a specific OpenCL program as fast as possible. This OpenCL program calculates cryptographic hash functions and has a benchmark report that displays how many hash calculations are made per second. Your FPGA/ASIC should calculate at least 20 billion hashes per second while executing our OpenCL kernel, and should con...

    $6838 (Avg Bid)
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    Em chào anh ạ, em tên là Thu Huyền Hiện tại bên công ty Nhật Bản bên em, có nhu cầu muốn tuyển nhân viên làm việc tại Nhật Bản 3 năm, sau đó về Việt Nam phát triển tiếp ở Hà Nội. Lương làm việc tại Nhật Bản là 4000$, kèm các phụ cấp, chế độ ạ. Nội dung công việc thì em đọc ...

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    1 bids
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    I need a PCB card with CMOS sensor readout over 16 LVDS channel. Data gathered will be compressed ([url removed, login to view] compression) and data output will be over USB 3.0 and/or GigE (both interfaces will be available and working on the board)

    $3020 (Avg Bid)
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    Hi, The vision I have in mind is comparable to a machine vision camera. CMOSIS CMV2000/4000 cmos sensor will be readout over LVDS channels and acquired data compressed with H264 encoder (MPEG 4) and compressed data will be send over GigE and/or USB 3.0. I'm a PCB designer with RF design experience, for this project: 1. Propose design architecture ( Pure FPGA, FPGA+controller, DSP or SoC ...

    $3670 (Avg Bid)
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    it has to print it in HIX in the digital numbers of the bored max voltage is 3.3 should be print as 3FF because we r working in 10 bits

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    12 bids

    it has to print it in HIX in the digital numbers of the bored max voltage is 3.3 should be print as 3FF because we r working in 10 bits

    $153 (Avg Bid)
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    6 bids

    I need a few suggestions on how to fix my project, schematic file created in quartus 13.1

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    13 bids

    There are two signals, A and Z. During a certain period, Z will always be low, and go high only once. Between any two Z pulses, there will be x A pulses. The purpose of this project is to determine the number of A pulses and the 'even-ness' of the A pulses; whether they're of uniform length during both high as well as low phase; the average high-to-low and low-to-high timings of eac...

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    10 bids

    I would like to hire a developer who can work exceptionally well in VHDL and is good in algorithms

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    14 bids

    Hi han121kun, I noticed your profile and would like to offer you my project. We can discuss any details over chat.

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    2 bids