Verilog / VHDL jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Hire Verilog / VHDL Designers

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    120 jobs found, pricing in AUD

    It is a Simple Verilog and Arithmatic Logic Unit.

    $51 (Avg Bid)
    $51 Avg Bid
    7 bids

    I need someone who could develop the program on labview using myrio to track sun and move the panels accordingly. I am using servo motors.

    $183 (Avg Bid)
    $183 Avg Bid
    10 bids

    small task on digital system and microprocessor using verilog amount usd 20 time 1 day

    $40 (Avg Bid)
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    10 bids

    Electrical engineering expert needed to do vhdl code $30 pay

    $67 (Avg Bid)
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    10 bids
    Custom Verilog design 4 days left
    VERIFIED

    We need to build a custom Verilog design. Please message for further details.

    $31 (Avg Bid)
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    13 bids
    project verilog 4 days left

    Hi Ahmed M., I noticed your profile and would like to offer you my project. We can discuss any details over chat.

    $15 / hr (Avg Bid)
    $15 / hr Avg Bid
    10 bids

    An applied project may involve using tools such as Spice, Verilog/VHDL, etc. to demonstrate its success

    $597 (Avg Bid)
    $597 Avg Bid
    10 bids
    Logisim Software Tasks 3 days left
    VERIFIED

    Hi I need someone who is good with Logisim Software to complete some tasks.

    $33 (Avg Bid)
    $33 Avg Bid
    9 bids

    Power Generation Simulation using LabVIEW. Power generation stations will often consist of a number of individual generators where each generates a proportion of the overall station’s output. Need two separate applications. Application 1 and Application 2.

    $69 (Avg Bid)
    $69 Avg Bid
    8 bids
    Digital design using Verilog 3 days left
    VERIFIED

    Use Basys 3 Board and Vivado 2016.2 I'll share the rest details

    $54 (Avg Bid)
    $54 Avg Bid
    7 bids

    Need help in VHDL everything is mentioned on the PDF

    $59 (Avg Bid)
    $59 Avg Bid
    6 bids

    I need help with capsim practice rounds

    $32 (Avg Bid)
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    4 bids
    verilog project 1 day left
    VERIFIED

    making verilog on quartus II (cyclone IV)

    $186 (Avg Bid)
    $186 Avg Bid
    11 bids

    I want someone to work on programming part in cloudsim that includes migration, Placement, scheduling and power consumption.

    $78 (Avg Bid)
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    2 bids

    Simple verilog programming project. Create an ALU with full [url removed, login to view] is desired is a Verilog system that can operate as a calculator with a set of logic gates attached. Other details provided later.

    $128 (Avg Bid)
    $128 Avg Bid
    14 bids

    Verification Of Motion Estimator Using UVM(Universal Verification Methodology)

    $305 (Avg Bid)
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    5 bids

    Simple verilog programming project. Create an ALU with full [url removed, login to view] is desired is a Verilog system that can operate as a calculator with a set of logic gates attached. Other details provided later.

    $114 (Avg Bid)
    $114 Avg Bid
    5 bids
    ASIC Design in Verilog 1 day left
    VERIFIED

    This project is related to Computational Neural Networks

    $240 (Avg Bid)
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    3 bids
    VHDL Radio clock 1 day left
    VERIFIED

    everything is going to be explained on the pdf

    $51 (Avg Bid)
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    11 bids

    I want to implement an audio visualizer on the screen of the voice spoken through the mic or played using SD card.

    $300 (Avg Bid)
    $300 Avg Bid
    4 bids