PART A
Create a project about a 128x3 (128 words, with 3 bits at each word) single- port RAM in Verilog, simulate the design, and load
it into the Cyclone IV chip on the DE0-Nano board. The design uses two push-buttons and one DIP switch as inputs.
One side of the DIP switch clears the memory address (not the memory contents).
The depressing of the first push-button indicates a memory write action. In this case, the 50 MHz clock signal available on the FPGA board is used as an input to increase the RAM address. The 3-bit data value written to a memory location at an address should represent the number of ones in the 7 address bits. For example, a value of 011 (=3) should be written to the location with an address of 1000011.
Once the first push-button is released, the memory read is in action. In this case, the 3-bit data stored at the current address are to be displayed using three LEDs. The releasing of the second push-button increases the memory address by one.
In addition, connect the 5 least significant address bits to 5 LEDs. Write a DO file for the simulation. The simulation needs to demonstrate the writing to the RAM followed by reading from the RAM, each involving a few RAM locations. You need
to do the following prior to compilation:
•
Generate a Verilog file for the single-port RAM by
using “the IP Catalog” of Quartus Prime. (Use “On Chip Memory” which is with in “Installed IP
−>
Library
−>
Basic Functions”.)
•
Add the Verilog file for the RAM to the project.
•
Instantiate a memory component in the design.
•
For the address control, you must instantiate two copies of a 7-bit up counter (modified from the 3-bit from Assignment 2). One is for generating read addresses and the other for write addresses. A multiplexer should be used to connect the right address to the RAM input.
•
For the simulation you will need to include the
altera_mf_verlibrary. This can be done in ModelSim-Altera using the “Libraries” tab within the “Start
Simulation” window.
PART B
Create a project about the on-board 3-D accelerometer in Verilog, and load it into the Cyclone IV chip on the DE0-Nano board. Th
e design uses one push-button and one LED.
•
Pressing down the push-button turns off the LED.
•
The LED is turned on when the board is suddenly mov
ed. (The degree/direction of movement is of your choice, but should be reasonable.)
Demonstrate the project. There is no need for simu
lation.
How it can be done:
On the DE0-Nano board CD, which is available on the
course Pilot website,
copy the folder demonstration/DE0_NANO_GSensor to t
he PC hard drive. From the
hard drive folder, you may use Quartus Prime to ope
n an existing project file,
compile the project, and program the board. There
is no need to assign pins since
that has already been done. Study the code. (On P
ilot, under FPGA/Verilog HDL
Sample Codes/GSensor-Demo-Code-Listing, there is a
PDF file, named “Using the
3D Accelerometer”, that describes the code.)
DE0_NANO_G_Sensor.v contains the
top-level module of the project.
Dear customer,
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I have a deep understanding about the DE0 Altera board.
Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price.
Thank you.
Hi
I have been working on Verilog-VHDL and Xilinx and Altera FPGAs by more than 6 years. Please let us discuss, I can do your work within the given time. But the budget is non negotiable.
Thanks