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I would like to hire a Verilog / VHDL Designer

₹600-1500 INR

Closed
Posted about 5 years ago

₹600-1500 INR

Paid on delivery
matrix multiplication using strassenalg and karatsuba alg and carry select adder
Project ID: 18769395

About the project

5 proposals
Remote project
Active 5 yrs ago

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5 freelancers are bidding on average ₹3,230 INR for this job
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Dear sir I have more than 10 years experience in digital design using vhdl please check my profile also please message me so that we can discuss
₹10,000 INR in 3 days
4.9 (446 reviews)
8.0
8.0
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I have well experienced in doing such kind of jobs......................................................................................................................................................................
₹1,300 INR in 1 day
4.8 (23 reviews)
5.1
5.1
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Have experience on HDL'S [VHDL , Verilog , System Verilog] 20 + years of experience on teaching VLSI /DSP Subjects
₹2,250 INR in 2 days
5.0 (3 reviews)
2.2
2.2
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Hi I am VLSI professional having experience of 5 years I have worked extensively on FPGAs like Xilinx Virtex 4, 6 and proficiently worked on 7 series Zedboard I have developed several communication protocol like I2C , SPI , UART , VGA. I am enthusiastic about learning new technology and will give extra effort wherever required. Please consider me for this project. Regards Prakhar Srivastava
₹1,300 INR in 4 days
4.0 (1 review)
0.6
0.6

About the client

Flag of INDIA
Nagercoil, India
0.0
0
Member since Feb 20, 2019

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