Develop a 4x4 multiplier

Develop a 4x4 multiplier. The multiplier uses a shift and add algorithm. The multiplier uses 2 phase clocking system

The inputs for the multiplier are A (A3, A2, A1, A0) and B (B3, B2, B1, B0), Reset and Start. The outputs for the multiplier are O (O7, O6, O5, O4, O3, O2, O1, O0), and Finish

The operation of the multiplier is as follows

1. When Reset = 1 the system is reset

2. When start = 1 the following occurs

a. Load A on the first 1

b. Load B on the first 1

c. After n cycles the output is stored in O and the Finish output is asserted d. There is no change to the output after subsequent cycles.

In this phase you are to describe the HDL code that you will use and the specify the names and timing types (s1, s2, etc) for all signals used to implement the system

Prepare a well organized and well written report that describes your analysis, model development, and simulation results.

Skills: Verilog / VHDL

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( 2 reviews ) riyadh, Saudi Arabia

Project ID: #8967032

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$30 USD in 0 days
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9 freelancers are bidding on average $109 for this job


Dear sir I have more than 8 years experience in digital design using verilog please check my profile also please message me so that we can discuss

$142 USD in 3 days
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I can do this task for you.I can do this task for you.I can do this task for you.I can do this task for you.I can do this task for you.

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I am an Electrical Engineer having specialization in Electronics and Control, teaching in Electrical Department at FAST National University Pakistan. I am also per-suing my MS degree in Electrical Engineering with spec More

$100 USD in 3 days
(27 Reviews)

Assalam O Alaikum Brother Verilog based system design is my main area of work. I can design your multiplier, implement it, simulate it and compose the report as well. Let me know if you are interested. MaAssalam More

$120 USD in 3 days
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$155 USD in 3 days
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I Can develop this design for you in very short duration with industrial quality. The deliverable includes 1. Fully synthesizable RTL code (Verilog) 2. Self checking Testbench for the design. The testbench will give More

$177 USD in 1 day
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recently i completed post graduation in vlsi design my project title on multipliers successfully completed

$111 USD in 3 days
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I will develop one 4x4 multiplier for you using verilog code. With your request the project include a shift and add algorithm. I believe with my ability more than 4 years to work with FPGA technology, it will help you More

$111 USD in 2 days
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