Verilog Phase Locked Loop Simulation
$10-30 USD
Paid on delivery
Verilog Phase Locked Loop Simulation
Project ID: #18329249
About the project
Awarded to:
I have 10 years of experiences in design and verify using Verilog and SystemVerilog HDL. I have experience of using tools such as VCS (Synopsys), Vivado (Xilinx), Quartus II (Altera), kits such as DE1, DE2 (Altera), Vi More
3 freelancers are bidding on average $23 for this job
Dear sir I have more than 10 years experience in digital design using verilog please check my profile also please message me so that we can discuss
