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$30 USD / hour
Flag of SPAIN
madrid, spain
$30 USD / hour
It's currently 6:58 AM here
Joined September 11, 2012
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Jaime G.

@jaimejgarnica

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$30 USD / hour
Flag of SPAIN
madrid, spain
$30 USD / hour
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C, C++, VHDL, Verilog developer

10/2012 to nowadays: Software engineer at Recreativos Franco Domain: R&D. Gambling. Work: Slot machine software design. Technologies: C/C++, Visual Studio .NET, Pattern design, SDL, DirectX. SAS accounting, Serial Port comms. 08/2009 to 10/2012: R&D Engineer at HPCN UAM ([login to view URL]) Domain: Industrial product innovation for NAUDIT ([login to view URL]). Academia R&D inside European projects. Work: FPGA-based HW/SW applications for line-rate networking. Technologies: C/C++, Linux apps, drivers, kernel modules. VHDL, Verilog, Xilinx tools such as ISE, XPS, iMPACT. Scripting, ModelSim, ChipScope.

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Experience

Software Engineer C++

RFranco
Oct 2012 - Present
C++ Software Engineer Gambling industry Embedded systems

FPGA engineer

HPCN UAM
Mar 2009 - Oct 2012 (3 years, 7 months)
Domain: High Performance Computing and Networking University research group. Status: International projects researcher. OneLab2 project: NetFPGA and GPS management and implementation for networking. EDK, VHDL. DEPACO project: 10GE management with FPGAs (control, filtering, etc.). ISE, VHDL. HLS research: High Level Synthesis Languages. AutoESL, SystemC, C++, C for HW synthesis.

Education

Post-degree on Computer Science and Telecommunication Engineering

Universidad Autónoma de Madrid, Spain 2009 - 2011
(2 years)

Computer Science

Universidad Autónoma de Madrid, Spain 2003 - 2009
(6 years)

Publications

High-­-accuracy network monitoring using ETOMIC testbed

V. Moreno and J. Garnica and F.J. Gomez-­ Arribas and S. Lopez-­Buedo and I. Gonzalez and J. Aracil and M. Izal and E. Magana and D. Morato
7th EURO-­-NF Conference on Next Generation Internet (NGI 2011); Kaiserslautern, Alemania; June, 28, 2011

ARGOS: A GPS Time-­-Synchronized Network Interface Card based on NetFPGA

Jaime J. Garnica, Victor Moreno, Ivan Gonzalez, Sergio Lopez-­-Buedo, Francisco J. Gomez-­-Arribas, Javier Aracil
2nd North America NetFPGA Development Workshop. 08-­-13-­-2010, Stanford University, California

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