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It's currently 9:17 AM here
Joined March 1, 2017
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Nagarjuna K.
@NagarjunaK1803
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FPGA Design Engineer
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Experience
Senior Hardware Design Engineer(VLSI)
Nov 2014 - Present
FPGA Design engineer with High speed device interfacing, NAND controller developed for Virtex 7 and worked with 450MHz DDR data speeds.
Education
B.Tech
(4 years)
Qualifications
PG Diploma
CDAC ACTS PUNE
2014
Post Graduation diploma in VLSI
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