Design of Bufferless NOC

I am looking for a skilled and experienced designer to create a Bufferless NOC design that focuses on reducing power consumption. The ideal candidate will have expertise in designing Mesh topologies for Network-on-Chip systems. Requirements: - Expertise in designing Bufferless NOCs with a focus on power consumption reduction - Proficiency in creating Mesh topologies for Network-on-Chip systems - Ability to work within specific constraints provided by the client Skills and Experience: - Strong knowledge of Bufferless NOC design principles and techniques - Experience in designing Mesh topologies for Network-on-Chip systems - Familiarity with power optimization techniques in NOC design - Ability to work within specific constraints and guidelines provided by the client If you have the required skills and experience, and are able to work within specific constraints, I would love to hear from you. Please provide examples of your previous work in Bufferless NOC design and Mesh topologies.